Your mission
We are seeking an experienced Lead ASIC Architect to define and drive the architecture of our custom ASICs that control next-generation photonic integrated circuits (PICs). In this role, you will be responsible for the high-level design of our ASIC, ensuring it meets functional, performance, and integration requirements. You will lead technical specification, interface definition, and design strategy, while managing and guiding an external ASIC design partner through development, verification, and tape-out.
This is a key leadership position at the intersection of photonics, electronics, and compute acceleration, with direct impact on the performance and scalability of our photonic compute platform.
Key Responsibilities:- Define the architecture and system-level specifications of the ASIC used to control photonic integrated circuits.
- Own the end-to-end ASIC definition process, including functional blocks, interfaces, clocking, power domains, and configuration flows.
- Collaborate with internal photonic, systems, and software teams to ensure tight integration of ASIC and PIC functionality.
- Manage and technically guide the external ASIC design partner throughout RTL development, verification, physical implementation, and tape-out.
- Review and approve specifications, design deliverables, test plans, and verification results from the external team.
- Identify architectural trade-offs in power, area, performance, and complexity, and make informed decisions.
- Define bring-up and test strategies in collaboration with firmware and hardware validation teams.
- Maintain clear project tracking, timelines, and risk management in the ASIC development lifecycle.
- Stay abreast of industry best practices and trends in mixed-signal and control ASICs for photonic and high-performance compute systems.